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? semiconductor components industries, llc, 2016 august, 2016 ? rev. 1 1 publication order number: ncp398/d ncp398 usb type-c vconn overvoltage protection ic the ncp398 is an overvoltage protection device. it protects vconn against overvoltages in applications where vconn is directly derived from the vbus supply. at power up, the integrated power mosfet is automatically controlled to reduce inrush current. the ic continuously monitors undervoltage, overvoltage and thermal events. in case of overvoltage, a very high speed comparator opens the power mosfet instantaneously. the part is enabled through the en pin. a high level on this pin allows forcing off the internal switch and drastically decreases the current consumption of the ncp398 core. features ? over?voltage protection up to + 28 v ? on?chip low r dson nmos transistors: typical 200 m ? over?voltage lockout (ovlo) ? shutdown en input ? output discharge path ? wlcsp4 package 0.84 x 0.84 mm, 0.4p ? udfn6 package 2 x 2 mm, 0.65p ? these parts are rohs devices typical applications ? type?c usb ? smartphones ? tablets figure 1. typical application circuit udfn6 case 517ab pin connections www. onsemi.com marking diagrams gnd in out en 1 2 3 6 5 4 aa = specific device code a = assembly location y = year w = work week wlcsp4 case 567mn udfn ordering information see detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. aa ayw av m (note: microdot may be in either location) wlcsp en gnd out in out in (top views) av = specific device code m = date code = pb?free package
ncp398 www. onsemi.com 2 figure 2. simplified block diagram, wlcsp and udfn packages table 1. csp pinout description pin pin name type description a1 out output output voltage pin. the out pin must be connected to the circuitry that is to be protected (vconn rail). b1 en i/o enable pin bar. the device enters in shutdown mode when this pin is tied high in which case the output is disconnected from the input. a2 in power input voltage pin. the in pin must be connected to the input power supply (vbus). b2 gnd power ground. must be connected to the system gnd plane. table 2. dfn pinout description pin pin name type description 1,2 in power input voltage pins. the two in pins must be hardwired together and are connected to the input power supply (vbus). 3 gnd power ground. must be connected to the system gnd plane. 5,6 out power output voltage pins. the two out pins must be hardwired together and are connected to the circuitry that is to be protected (vconn rail). 4 en i/o enable pin bar. the device enters in shutdown mode when this pin is tied high in which case the output is disconnected from the input. 7 pad power dfn package back side pad. must be connected to ground plane for thermal dissipation optimization.
ncp398 www. onsemi.com 3 table 3. maximum ratings rating symbol value unit minimum v oltage (all to gnd) v min ?0.3 v maximum voltage (ins to gnd) v inmax 29 v maximum voltage (all others to gnd) v max 7 v maximum dc current i max 0.8 a thermal resistance, junction to air wlcsp (note 1) dfn (note 1) r ja 170 145 c/w operating ambient temperature range t a ?40 to +85 c storage temperature range t stg ?65 to +150 c junction operating temperature t j +125 c human body model (hbm) esd rating are (note 2) esd hbm 2 kv charged device model (cdm) esd rating are (note 2) esd cdm 1 kv latch up current (note 3) i lu 100 ma moisture sensitivity msl level 1 stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be af fected. 1. the r ja is highly dependent on the pcb heat sink area. as example udfn6 r ja is 220 c/w with 50 mm 2 (copper 35 m, 1 oz) and 145 c/w with 200 mm 2 (copper 35 m, 2 oz). 2. human body model, 100 pf discharged through a 1.5 k resistor following specification jesd22/a114, charged device model (cdm) per jedec standard: jesd22?c101 class iv. 3. latch up current per jedec standard: jesd78 class ii.
ncp398 www. onsemi.com 4 table 4. electrical characteristics min / max limits values (?40 c < t a < +85 c) and v in = +5 v (unless otherwise noted). typical values are t a = +25 c. characteristics symbols conditions min typ max unit input voltage range v in ? ? 28 v under voltage lockout uvlo vin rising 2.4 ? 2.8 v under voltage lockout hysteresis uvlo hyst vin falling ? 50 ? mv over voltage lockout threshold ovlo (note 4) vin rising 5.50 5.65 5.80 v over voltage lockout threshold hysteresis ovlo hyst vin falling ? 115 ? mv vin versus vout resistance r dson vin = 5 v, en = low, 25 c, wlcsp ? 190 220 m ?40 c < t j < 85 c, wlcsp ? 230 260 vin = 5 v, en = low, 25 c, udfn ? 230 260 ?40 c < t j < 85 c, udfn ? 270 300 supply quiescent current i dd no load. en = low ? 40 60 a off current i off en = high ? ? 1.5 a standby current i stb vin = 2.4 v ? ? 2.5 a output discharge path r pd from en = low to high or vin < uvlo ? hysteresis to vout = v pd 8 10 12 k output discharge path level v pd vout falling ? 0.63 ? v en en voltage high v ih 1.2 ? ? v en voltage low v il ? ? 0.4 v en input leakage current i en 0 < v en < 5.5 v ?1 0 +1 a timings ton time t on vin valid, from en high to low, 90% vout ? 0.3 1 ms disable time t off from en low to high, to 90% vout. r load 100 ? 10 ? s ovlo turn off time t ovlo vin exceeding v ovlo at 2 v/ s to vout starts decreasing. r load 100 ? 100 ? ns tsd thermal shutdown tsd ? 150 ? c thermal shutdown rearming tsd rearm ? 125 ? c 4. please contact your on representative for additional ovlo thresholds. product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions.
ncp398 www. onsemi.com 5 operation the ncp398 device provides overvoltage protection when a wrong input supply is connected or voltage ringing appears on the input line. the internal nmos fet is soft start controlled to limit inrush current into the load (capacitors, ic wake up). the device integrates an enable control pin, undervoltage and overvoltage comparators, and output discharge path to eliminate residual voltage after the turn off. timings chronogram and states description the phase 1 sections described below are respectively the off state (en high) and the standby state (vin < uvlo) of the device. when vin is below the undervoltage comparator (uvlo) or en is tied high, ncp398 will be in this state. phase 2 corresponds to the defined time for the gate driver soft start. referring to the electrical parameter, this phase is aligned to ton time. phase 3 is the normal operation, with vin valid, the part enabled and there is no fault. the behavior during an overvoltage condition is detailed in the phase number 4. figure 3. timings diagram enable bar pin (en ) the part is enabled through the en pin. in some diagrams and figures, enb refers to en . a high level on this pin allows forcing off the internal switch and drastically decreases the current consumption of the ncp398 core. to exit the off state, the en pin must be tied low. under?voltage lockout (uvlo) to ensure proper operation under any conditions, the device integrates an under?voltage lock out (uvlo) comparator. this block has a built?in hysteresis to provide noise immunity to transient conditions. over?voltage lockout (ovlo) to protect connected systems on v out pin from over?voltage, a second comparator, over?voltage lock out (ovlo), is embedded. during over?voltage condition, the output remains disabled until the input voltage drops below the ovlo ? comparator hysteresis. auto discharge ? r pd when disabling the ncp398 the output gets automatically discharged by means of the internal pull down resistor rpd. once reaching the vpd level the discharge path is disabled. the auto?discharge is also engaged when vin drops below the uvlo threshold. the auto?discharge ensures a proper power cycling of peripherals connected to the output of the ncp398. thermal shutdown protection in case of internal overheating, the integrated thermal shutdown (tsd) protection will open the internal nmos fet in order to instantaneously decrease the device temperature . embedded hysteresis allows reengaging the nmos fet when the junction temperature decreases. this off?on cycle is repeated until the fault event disappears.
ncp398 www. onsemi.com 6 typical characteristics figure 4. ron vs. v in, overtemperature figure 5. ron vs. temperature, at fixed vin voltage v in (v) tempera ture ( c) 5.5 5.0 4.5 4.0 3.5 3.0 2.5 0 50 100 150 200 250 300 400 100 80 60 40 20 0 ?20 ?40 0 50 100 150 250 300 350 400 figure 6. standby current vs. vin, over temperature figure 7. standby current vs. vin, over temperature v in (v) v in (v) 6 5 4 3 2 1 0 0 1 2 3 30 25 20 15 10 5 0 ?5 0 5 10 15 30 40 45 figure 8. quiescent current vs. vin, over temperature figure 9. quiescent current vs. vin, over temperature v in (v) v in (v) 6 5 4 3 2 1 0 0 20 40 60 80 100 120 30 25 35 20 15 10 5 0 0 20 40 60 80 100 120 r dson (m ) r dson (m ) i stb ( a) i stb ( a) i dd ( a) i dd ( a) 350 temp = 125 c 105 c 85 c 50 c ?25 c 0 c 25 c ?40 c 200 120 temp = 85 c v in = 2.8 v v in = 5.0 v temp = 25 c temp = ?40 c temp = 85 c temp = 25 c temp = ?40 c 20 25 35 temp = 85 c temp = 25 c temp = ?40 c temp = 125 c temp = 85 c temp = 25 c temp = ?40 c
ncp398 www. onsemi.com 7 figure 10. soft start up on load, vin: yellow, vout: blue, en : pink, iout: green figure 11. hot plug on load, vin: yellow, vout: blue, en : pink, iout: green
ncp398 www. onsemi.com 8 figure 12. soft start on cout 10 f, 500 ma, vin: yellow, vout: blue, en : pink, iout: green figure 13. ncp398 enable (enb forced low) vin: yellow, vout: blue, en : pink, iout: green
ncp398 www. onsemi.com 9 figure 14. ncp398 disable (enb forced high) vin: yellow, vout: blue, en : pink, iout: green figure 15. ncp398 overvoltage time response, vin: yellow, vout: blue
ncp398 www. onsemi.com 10 figure 16. ncp398 pull down level (following disable) vin: yellow, vout: blue, en : pink figure 17. ncp398 pull down level (following uvlo) vin: yellow, vout: blue, en : pink
ncp398 www. onsemi.com 11 ordering information device marking package shipping ? ncp398fcct1g aa wlcsp4 0.84x0.84 mm 3000 tape / reel NCP398MUTBG av udfn6 2x2 mm 3000 tape / reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd801 1/d. package dimensions notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is mea- sured between 0.15 and 0.25mm from the terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. 5. tie bars may be visible in this view and are connected to the thermal pad. seating plane 0.10 c a3 a a1 0.10 c udfn6 2x2, 0.65p case 517ab issue c dim a min max millimeters 0.45 0.55 a1 0.00 0.05 a3 0.127 ref b 0.25 0.35 d 2.00 bsc d2 1.50 1.70 0.80 1.00 e 2.00 bsc e2 e 0.65 bsc l --- 0.15 l1 pin one reference 0.08 c 0.10 c 6x l e e2 b 3 6 6x 1 4 d2 bottom view 0.25 0.35 l1 detail a l alternate terminal constructions l ?? ?? *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. soldering footprint* 2.30 0.65 0.47 6x dimensions: millimeters 0.40 1.70 pitch 0.95 6x 1 package outline recommended top view side view detail b note 4 detail a end view a m 0.10 b c m 0.05 c d e a b note 5 c
ncp398 www. onsemi.com 12 package dimensions case 567mn issue o seating plane notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. datum c, the seating plane, is defined by the spherical crowns of the contact balls. 4. coplanarity applies to spherical crowns of contact balls. 5. dimension b is measured at the maximum con- tact ball diameter parallel to datum c. dim a min max ??? millimeters a1 d e b 0.24 0.30 e 0.40 bsc 0.60 e d a b pin a1 reference 0.05 c 4x b 12 b a 0.10 c a a1 a2 c 0.18 0.22 top view side view bottom view note 4 e a2 0.34 ref pitch 0.24 4x dimensions: millimeters *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. soldering footprint* 0.40 0.40 recommended a1 pitch a3 0.02 ref note 3 note 5 a3 detail a a2 backside coating a 0.15 b c 0.05 c 0.05 c 2x 0.05 c 2x e detail a 0.84 bsc 0.84 bsc p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ncp398/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your lo cal sales representative on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent? marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates , and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or dea th associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semicon ductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner.

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